State the term- use a define function, Computer Engineering

Assignment Help:

State the term- Use a define function

This is almost exactly the same approach as #define and -D compiler arg that C programs use. In your  Verilog  code,  use  a  'define  to  define  the  variable  condition  and  then  use  Verilog preprocessor directives such as 'ifdef. Use the '+define+' Verilog command line option. For an illustration:

... to run the simulation ..

verilog testbench.v cpu.v +define+USEWCSDF

... in your code ...

'ifdef USEWCSDF

initial $sdf_annotate (testbench.cpu, "cpuwc.sdf");

'endif

+define+ can also be filled in from your Makefile invocation, which in turn, can be finally filled in your UNIX prompt command line.

Defines are a blunt weapon since they are very global and you can only do so much with them asthey are a pre-processor trick. Consider the subsequent approach before resorting to defines.

 


Related Discussions:- State the term- use a define function

Criteria for selecting a theme for a project, Q. Criteria for selecting a t...

Q. Criteria for selecting a theme for a project? Topics for projects as we indicated earlier should emerge from the children's world. Teaching often becomes boring and unintere

What is the difference between in two lines of verilog code, What is the di...

What is the difference between the following two lines of Verilog code? #5 a = b; a = #5 b; #5 a = b; Wait five time units before doing the action for "a = b;". Value assig

Concept development of project, Concept Development Journal General In...

Concept Development Journal General Information: Once you have researched and gained some insight into the topic you must then begin developing your ideas and your conceptua

Give difference between assembler and interpreter, Give difference between ...

Give difference between assembler and interpreter. Assembler: It is the translator for an assembly language of computer. An assembly language is a low-level programming langu

Explain the odd-even transposition algorithm, Q. Explain the odd-even trans...

Q. Explain the odd-even transposition algorithm? The algorithm needs one 'for loop' beginning from I=1 to N it implies that N times and for every value of I, one 'for loop' of

What is phase encoding, What is phase encoding or Manchestor encoding? ...

What is phase encoding or Manchestor encoding?  It is the method for combining clock information with data. It is a scheme in which alters in magnetization occur for each data

What is disk controller and word count, What is disk controller The ele...

What is disk controller The electronic circuit that controls the operation of the disk known as disk controller.  word count The number of words in the block to be tran

Explain the action-object matrix, Explain the Action-object matrix A...

Explain the Action-object matrix A matrix showing how update actions influence objects.  It may be considered to be part of user object model as it summarizes user object ac

What is model, What is model?  A universe together with an assignment o...

What is model?  A universe together with an assignment of relations to relation symbol is known as a model.  A model M is a tuple (U, P1, P2..Pk), where U is the universe and P

Determine about the virtual private networks, Virtual Private Networks (VPN...

Virtual Private Networks (VPN) In order to encrypt/decrypt all the communication network traffic that passes through the Internet or Intranet, a VPN uses software or hardware.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd