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Q. For a transmission-line model that includes only the series impedance Z, sketch phasor diagrams for:
(a) Lagging power factor load.
(b) Leading power factor load.
i want to know the all the three jfet in present and future use and desing for each component
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How can i build 1-16 DEMUX using 1-8 DEMUX with logic gates only ?
Usage: Because of the above inherent drawbacks, fixed bias is seldom used in linear circuits (that is those circuits which use the transistor like a current source). Instead,
Q. The inductance per unit length in H/mfor parallel plate in?nitely long conductors in air is given by L = µ 0 d/w = 4π×10 -7 d/w, where d and w are inmeters.Compute L (per unit
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Q. A 230-V, single-phase, 60-Hz source supplies two loads in parallel. One draws 10 kVA at a lagging power factor of 0.80 and the other draws 6 kWat a lagging power factor of 0.90.
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