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Considering the TTL NAND gate circuit of Figure, with one or more inputs low, show that the output will be high.
Q. Design the low-pass filter shown in Figure (by determining L) to have a half-power frequency of 10 kHz.
Q. Show the Methods of material handling? Methods of material handling during operations and maintenance activities shall be considered for all facilities to ensure that the fi
Q. Show Maximum Differential Input Voltage of amplifier? This is the maximum value of differential input voltage v p - v n that can be applied without damaging the op amp.
Q. Can you explain twos Complement Division? 2's complement division is repeated 2's complement subtraction. The 2's complement of the divisor is calculated, and then added to
1. (a) Consider a sinusoidal signal m(t) = A cos(2 Π f m t) applied to a delta modulator with step size . Determine the range of the step size so that slope overload will be avoide
Q. Why FET is a voltage sensitive device explain from the drain characteristics? The JFET consists of a thin layer of n-type material with two ohmic contacts,the source S and t
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Q. Three loads in parallel are supplied by a single phase 400-V, 60-Hz supply: Load A: 10 kVA at 0.8 leading power factor Load B: 15 kW at 0.6 lagging power factor Load C:
Explain the Asynchronous Up-Down Counters? In some applications a counter must be able to count both down and up and the circuit below is a 3-bit up-down counter. It counts do
Electrical power Power P in an electrical circuit is given by the product of potential difference V and current I. The unit of power is the watt, W.
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