RISC Characteristics :

The  concept  of  RISC  architecture  include  an  attempt  to  reduce  execution  time  by make  simple  the instruction set of the computer. The main characteristics of a RISC processor are:

1) Relatively few instructions

2) Relatively few addressing modes

3) Memory access limited to load and store instructions

4) All operations done within the registers of the CPU

5) Fixed-length, easily decoded instruction format

6) Single-cycle instruction execution

7) Hardwired rather than micro programmed control

A characteristic of RISC processors is their capability to execute 1 instruction per clock cycle. It is done by overlapping the decode fetch and execute phases of 2 or 3 instructions using a process referred to as pipelining.  A store or load instruction can require 2 clock  cycles because access to memory takes more register operations.  Efficient  pipelining,  and a few other  characteristics, are sometimes credited to RISC, although they can exist  in non-RISC architectures as well. Other characteristics related to RISC architecture are:

1) A relatively large number of registers in the processor unit.

2) Use of overlapped register windows to speed-up procedure call and return.

3) Efficient instruction pipeline.

4) Compiler  support  for efficient  translation  of high-level  language  programs  into  machine  language programs.