Register data type as sequential element, Computer Engineering

Assignment Help:

Reg data type as Sequential element

module reg_seq_example( clk, reset, d, q);

input clk, reset, d;

output q;

reg q;

wire clk, reset, d;

always @ (posedge clk or posedge reset)

if (reset) begin

q <= 1'b0;

end else begin

q <= d;

end

endmodule

There is a difference in the process of assigning to reg when modeling combinational logic: in this logic we use blocking assignments when modeling sequential logic we use nonblocking ones.

 


Related Discussions:- Register data type as sequential element

What are the largest UDP messages, What are the largest UDP messages that c...

What are the largest UDP messages that can fit into single Ethernet frame? UDP utilizes IP for delivery. As ICMP UDP packet is encapsulated in IP datagram. Therefore entire UDP

What are the characteristics of sram, What are the characteristics of SRAM?...

What are the characteristics of SRAM? SRAM are fast They are volatile They are of high cost Less density

What are privileged instructions, What are privileged instructions?  So...

What are privileged instructions?  Some of the machine instructions that might cause harm to a system are designated as privileged instructions. The hardware permits the privil

What is the resolution of this DAC, A 5-bit DAC produces an output voltage ...

A 5-bit DAC produces an output voltage of 0.2V for a digital input of 00001. Find the value of the output voltage for an input of 11111. What is the resolution of this DAC? Ans

Show packing and unpacking data, Q. Show Packing and Unpacking Data? P...

Q. Show Packing and Unpacking Data? Packing and Unpacking Data  pvm_packs - Pack active message buffer with arrays of prescribed data type: int info = pvm_pac

What is page fault, What is page fault? Its types? Page fault refers to...

What is page fault? Its types? Page fault refers to the situation of not having a page in the major memory when any process references it. There are two kinds of page fault :

Discuss the 5-level switching hierarchy recommended by ccitt, Discuss the 5...

Discuss the 5-level switching hierarchy recommended by CCITT. Hierarchical networks are able of handling heavy traffic where needed, and at similar time use minimal number of t

Develop a menu-driven application, In assignment you are required extend th...

In assignment you are required extend the Patient class to implement an  Inpatient  class,  representing a patient who is admitted to the hospital for a longer term and who may req

What do you meant by extranets, Extranets can be also used to connect an in...

Extranets can be also used to connect an intranet to Internet so that remote offsite access can be made in a company's intranet by an authorized individual. This can facilitate thr

Principles of logic circuits, A logic gate is an electronic circuit that ge...

A logic gate is an electronic circuit that generates a typical output signal which depends on its input signal. Output signal of a gate is a general boolean operation of its input

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd