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Performance of caches:
Amdahl's Law regarding overall speed up:
Alternatively, CPU stall can be considered:
CPU execution time =( CPU clock cycle + Memory stall cycle)*clock cycle
The number of memory stall cycle depends:
Memory stall cycle=IC * Memory reference per instruction *Miss rate *Miss penalty
Table: Direct mapped cache,32-byte block ,SPEC92,DEC station 5000
Define processor clock. Processor clock is explained as the time periods in which all operations and data transfer within the processor take place.
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