Performance of caches - computer architecture, Computer Engineering

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Performance of caches:

Amdahl's Law regarding overall speed up:

354_Performance of caches1.png

Alternatively, CPU stall can be considered:

CPU execution time =( CPU clock cycle + Memory stall cycle)*clock cycle

The number of memory stall cycle depends:

Memory stall cycle=IC * Memory reference per instruction *Miss rate *Miss penalty

Table: Direct mapped cache,32-byte block ,SPEC92,DEC station 5000

1340_Performance of caches.png

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