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Performance of caches:
Amdahl's Law regarding overall speed up:
Alternatively, CPU stall can be considered:
CPU execution time =( CPU clock cycle + Memory stall cycle)*clock cycle
The number of memory stall cycle depends:
Memory stall cycle=IC * Memory reference per instruction *Miss rate *Miss penalty
Table: Direct mapped cache,32-byte block ,SPEC92,DEC station 5000
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Relocation bits used by relocating loader are specified by? Ans. Relocation bits utilized by relocating loader are identified by Assembler or Translator.
explain common bus system with the help of neat diagram in basic computer.
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