Performance of caches - computer architecture, Computer Engineering

Assignment Help:

Performance of caches:

      Amdahl's Law regarding overall speed up:

 

354_Performance of caches1.png

 

             Alternatively, CPU stall can be considered:                                                                  

CPU execution time =( CPU clock cycle + Memory stall cycle)*clock cycle

The number of memory stall cycle depends:

Memory stall cycle=IC * Memory reference per instruction *Miss rate *Miss penalty

Table: Direct mapped cache,32-byte block ,SPEC92,DEC station 5000

 

1340_Performance of caches.png

 


Related Discussions:- Performance of caches - computer architecture

What are the update types possible, What are the update types possible? ...

What are the update types possible? The following update types are possible: Update type A: The matchcode data is updated asynchronously to database changes. Update

Search-based tools, The search-based tools initially identify the problem a...

The search-based tools initially identify the problem and after that appropriately give advice on how to correct it. AT Expert from Cray Research is one of the tools being used

Name the various display devices, Name the various Display devices Diff...

Name the various Display devices Different types of display devices are discussed along with the principles on which these work. The main display devices used with CAD systems

What do you mean by software poll, Q. What do you mean by Software Poll? ...

Q. What do you mean by Software Poll? In this scheme on occurrence of an interrupt, processor jumps to an interrupt service program or routine whose job is to poll (roll call

fisherpersons are not over-fishing, Prepare the Relational Tables to signi...

Prepare the Relational Tables to signify the following situation, which is defined by means of text and an Entity Relationship Diagram. Note: Do not attempt to vary the ERD. Yo

Explain the working of a weighted register d/a converter, With the help of ...

With the help of a neat diagram, explain the working of a weighted-resistor D/A converter. Ans Weighted Register D/A Converter:   Digital input that has 4 bits

Database management system, what would be the occupancy of each leaf node o...

what would be the occupancy of each leaf node of a B+ tree

Illustrate about object oriented development, Illustrate about object orien...

Illustrate about object oriented development object oriented development is not direct way of system development as in this approach a holistic view of application domain is co

What is logical address space and physical address space, What is logical a...

What is logical address space and physical address space? The set of all logical addresses generated by a program is known as a logical address space; the set of all physical a

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd