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Mode 2
In this mode transistor gets turned off by the negative output of PWM current flows through inductance L diode D then divide into two parts one flows through capacitor C and other load. In this condition the magnetic field in the inductor collapses and induces a large voltage across the coil of opposable polarity.
That adds to the input voltage capacitor C will charge through this current and maintain the o/ p voltage when transistor gets turned on for next cycle.
front pannel of dsd....?
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