Q. Major problems associated in writing with cache memories?

The data in main and cache memory can be written by processors or I/O devices. The major problems associated in writing with cache memories are:

a) The contents of cache and main memory can be changed by more than one device. For illustration CPU can write to caches and I/O module can directly write to main memory. This can result in inconsistency in values of main and cache memory.

b) In case of multiple CPUs with different cache a word changed in one cache automatically invalidates that specific word in other cache as well.

The proposed schemes for writing in system with caches are:

(a) Write through: Write the data in main memory as well as cache memory. The other CPUs - Cache combination has to watch with traffic to main memory and make appropriate modification in contents of cache. The drawback of this scheme is that a bottleneck is created because of large number of accesses to main memory by different CPUs.

 (b) Write block: In this technique updates are made only in cache, setting a bit known as Update bit. Only those blocks whose update bit is set is replaced in main memory. However here all accesses to main memory whether from other CPUs or I/O modules required from cache resulting in complex circuitry. 

 (c) Instruction Cache: An instruction cache is one that is used for accessing only instructions and nothing else. Benefit of such a cache is that as instructions don't change we do not need to write instruction cache back to memory unlike data storage cache.