Loop level-levels of parallel processing, Computer Engineering

Assignment Help:

Loop Level

At this level, repeated loop iterations are the applicants for parallel execution. However, data dependencies among subsequent iterations may limit parallel execution of instructions at loop level. There is a lot of scale for parallel execution at loop level.

Ex: In the following loop in C language, for (i=0; i <= n; i++)

A(i) = B(i)+ C(i)

Each of the instruction A(i) =B(i)+C(i) can be implemented by different processing elements supplied  there are at least n processing elements. But, the instructions in the loop:

for ( J=0, J<= n, J++) A(J) = A(J-1) + B(J)

Cannot be implemented parallel as A(J) is data dependent on A(J-1).  This means that previous to exploiting the loop level parallelism the data dependencies have to be checked:

 


Related Discussions:- Loop level-levels of parallel processing

Shell is the exclusive feature of, Shell is the exclusive feature of? A...

Shell is the exclusive feature of? Ans. Shell is the exclusive feature of UNIX.

Extension of propositional logic, Extension of propositional logic: Aw...

Extension of propositional logic: Away from proving  theorems directly, and the other main use for rewrite rules is to prepare a statement just for use before we search for th

Explain extended binary coded decimal interchange code, Q. Explain Extended...

Q. Explain Extended Binary Coded Decimal Interchange Code? Extended Binary Coded Decimal Interchange Code (EBCDIC) is a character-encoding format employed by IBM mainframes. It

Why use a DTD (Document Type Definition), Why use a DTD ( Document Type Def...

Why use a DTD ( Document Type Definition )? XML gives an application independent method of sharing data. Along with a DTD, independent group of people can agree to employ a com

Explain the operation of 8:1 multiplexer, Explain the operation of 8:1 mult...

Explain the operation of 8:1 multiplexer. Ans: In this multiplexer 8 Input and 1 Output and three select lines i.e. S 2 , S 1 , S 0 are given. Any one of the inputs will be

Explain about RISC architecture, Q. Explain about RISC ARCHITECTURE? Le...

Q. Explain about RISC ARCHITECTURE? Let's first list some significant considerations of RISC architecture: 1. RISC functions are kept simple unless there is a very good reas

Full adder, design a FULL adder with two half adders and an or gate

design a FULL adder with two half adders and an or gate

Handshake packets - computer architecture, Handshake packets: Handshak...

Handshake packets: Handshake packets consist of nothing but a PID byte, and are usually sent in response to data packets. The 3 basic types are, NAK, indicating that the data

What are the different types of computer networks, Q. Mention different cla...

Q. Mention different classes of computer networks (on the basis of scale) and distinguish one from the other. Ans: Local Area Network (LAN) Metropolitan Area Netw

Explain direct addressing mode with example, Q. Explain Direct Addressing M...

Q. Explain Direct Addressing Mode with example? Direct Addressing Mode A direct operand signifies to contents of memory at an address referred by the name of the variable.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd