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Inherent addressing
Here the address is already built in to the instruction i.e. inherent to the code ABA ; Add A to B and store the answer in A Simple programs using the 68HC11 language
This section of functions include instructions such as ALU functions, simple movement and logically operations .Let us consider the addition of two 8 bit numbers
Program One: Data is immediate LDAA #$fe ; Load hex fe into accumulator A ADDA #$1 ; Add 1 hex to A i.e total = ff hex Program two: Direct addressing and extended addressing
Assume the data is stored at the following Ram address
Address Data 501 fe Number One 502 01 Number Two 503 Result LDAA $501 ;Load fe from address 501 into A ADDA $502 ;Add 01 from address 502 into A STAA $503 ;Store the answer ff at address 503 Program three: Index addressing
Address Data 500 fe Number One 501 01 Number Two 502 Result LDX #$500 ;Load IX with 500 base address LDAA $0,X ;Load data from 500 + 0 into A i.e fe ADDA $1,X ;Add data from 500+1 to A i.e ff STAA $2,X ;Store A at address 500+2
Q.What is Replacement Policy in cache? When a new block has to be fetched in cache the other block may have to be replaced to make room for new block. Replacement policy determ
The use of distributed shared memory in parallel computer architecture however the use of distributed shared memory has the problem of accessing the remote memory that results in l
Question: a) What is the main difference between the Princeton and Harvard microprocessor architectures? b) State five main differences between CISC and RISC architectures?
Explain 100 line exchange with two-motion line finders. Design: In such design, here are 24 line finders. When any of the 100 subscribers has to find access to any of the 24
Which Command permits for vertical alignment of fields one below the other. UNDER Command is used ofr vertical alignment.
History of Information Technology and Organisations The increasing sophistication in information systems and the growth in their use have been influenced by three main factors
What are the characteristics of semiconductor RAM memories? They are available in a wide range of speeds. Their cycle time range from 100ns to less than 10ns. The
Minimize the logic function F(A, B, C, D) = ∑ m(1,3,5,8,9,11,15) + d(2,13) using NAND gate with help of K-map. Ans. Realization of given expression by using NAND gates: In
What are the restrictions on Subscreens? Subscreens have various restrictions. They cannot: Set their own GUI status Have a named OK code Call another screen
Determine the Ad hoc testing - It is a type of testing which is performed without the use of planning or/and documentation. - These tests are run only one time unless a defe
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