Q. Illustration of an instruction cycle?

Instruction cycle displayed in given figure comprises subsequent stages:

• First address of the subsequent instruction is calculated based on size of instruction and memory organisation. For an illustration if in a computer an instruction is of 16 bits in addition if memory is organized as 16-bits words then address of subsequent instruction is calculated by adding one in address of current instruction. If the memory is organized as bytes that can be addressed independently then we need to add two in current instruction address to obtain the address of next instruction to be executed in series.
• Now the subsequent instruction is obtained from a memory location to CPU registers like Instruction register.
• Subsequent state decodes instruction to decide the type of operation desired and operands to be used.
• In case operands need to be obtained from memory or by Input devices then the address of memory location or Input device is evaluated.
• Now the operand is obtained (or operands are obtained one by one) from memory or read from Input devices.
• Next the operation asked by instruction is carried out.
• Ultimately the results are written back to memory or Output devices wherever desired by calculating the address of operand and then transferring values to desired destination.

Please remember that multiple results and multiple operands are allowed in many computers. An illustration of such a case may be an instruction ADD A, B. This instruction needs operand A and B to be obtained. 

In some machines a single instruction can activate an operation to be carried out on an array of numbers or string of characters. Such an operation engages repeated fetch for operands without fetching instruction again which is the instruction cycle loops at operand fetch.