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Reg data type as Combinational element
module reg_combo_example( a, b, y);
input a, b;
output y;
reg y;
wire a, b;
always @ ( a or b)
begin
y = a & b;
end
endmodule
This gives the same output as that of assign statement, with the only difference that y is declared as reg. There are distinct benefits to have reg modeled as combinational element; reg type is useful when a "case" statement is required.
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