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Illustrate functional diagram of digital multiplexer. Write the scheme of a 4- input multiplexer using basic gates (AND/OR/NOT) and explain its operation.
Ans:
Multiplexer: Data selector or MUX is a logic circuit selects binary information from one of several input and directs this to a single output line. Selection of the individual input line is controlled through a set of selection lines. Generally there are 2n input lines and respectively n selection lines.
Here 4 inputs that are I1 I0 I2 I3 and two selection line as S0 and S1. Depending on the bit combination of S0 and S1 one of the inputs is moved to the output. Fundamentally there is a decoder circuit along with one input for each bit of information and one OR gate linked to the output. If So, Si = 00, then first AND gate will contain the two inputs as one output will depend upon I0. At similar time outputs of all other AND gates are Zero.
The multiplexer is a combinational circuit that is individual most broadly utilized standard circuit in digital design. This has N select lines 2N inputs and a particular output.
Multiplexer:-
Y = S‾1S‾0 I0 + S‾1S0 I1 + S1S‾0I2 + S1S0 I3
Truth table of 4x1 Mux
Select inputs
Output
S1
S0
Y
0
I0
1
I1
I2
I3
Circuit Diagram of 4 X 1 MUX using basic gate
Write a program to mask bits D3D2D1D0 and to set bits D5D4 and to invert bits D7D6 of the AX register.
Unification - Artificial intelligence: We have said that the laws of inference for propositional logic detailed in the previous lecture can also be used in first-order logic.
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