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How many bits must be decoded for chip select? What is the size of decoder when 128 × 8 RAM chips are required to provide a memory capacity of 2048 bytes?Ans. All higher order lines will be applied to decoder input that means that total 128 (27) locations are there and all location can store 8 bits. The no. of inputs to the decoder will be 11 - 7 = 4. And the decoder size will be 4x16. All 16 decoder outputs will be connected to the chip select input of single chips.
Intel's 8086 was the first 32-bit processor, and as the company had to backward-support the 8086. All the modern Intel-based processors will run in the Enhanced mode, capable of sw
In binary counter the flip flop of lowest order position is complemented with each pulse. This means that JK input position must be maintained with logic one
Q. Concurrently read concurrently write? It is one of the models derived from PRAM. In this model the processors access the memory locations simultaneously for reading and writ
Cluster is said to be collection of queue manager's logically linked together to balance the load on the remote machine (i.e if it is remote queue managers which processes your mes
In a DTMF phone, digits are represented by: (A) Orthogonal frequencies. (B) Orthogonal Phases. (C) Orthogonal codes. (D) Orthogonal pulses. Ans: Di
Differentiate between WML-Script and Web-based scripting languages. WML Script is a lightweight procedural scripting language, optimized for small-memory, low-power CPU wireles
Which method is used for resolving data dependency conflict by the compiler itself? (A) Delayed load. (B) operand forwarding. (C) Pre fetch target instruction. (D) loo
What is Fork Clk gets its value after 1 time unit, reset after 10 time units, enable after 5 time units, data after 3 time units. All the statements are executed in parallel.
Q. Show typical microprocessor system architecture? A microprocessor system bus consists of three physical buses: the address bus, the data bus, and the control bus. The types
Explain cause effect graphing . Cause-effect graphing is a test case design method that gives a concise representation of logical conditions and corresponding actions. The
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