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How many bits must be decoded for chip select? What is the size of decoder when 128 × 8 RAM chips are required to provide a memory capacity of 2048 bytes?Ans. All higher order lines will be applied to decoder input that means that total 128 (27) locations are there and all location can store 8 bits. The no. of inputs to the decoder will be 11 - 7 = 4. And the decoder size will be 4x16. All 16 decoder outputs will be connected to the chip select input of single chips.
Resource Dependence The parallelism among the instructions may also be affected because of the shared resources. If two instructions are using the related shared resource t
Q. Logic diagrams for same Boolean expression? The expression F can be simplified using Boolean algebra. The logic diagram of simplified expression is drawn in fig (b)
Blue Sky events is an organisation that devices and runs large outdoor events. They have been commissioned to organise and run an event for four months over the summer period in a
Explain about Distributed Shared Memory Systems? Distributed Shared Memory (DSM) systems emulate a shared memory abstraction on loosely coupled architectures in order to allow
Q. Show the Decimal equivalent of a binary number? In binary numbers we have two digits 0 and 1 in addition they can also be signified as a string of these two-digits known as
Write a program to check whether a given word is a palindrome or not? # include # include void main() { char word[10]; int length=0,mid,count=0; clrscr();
Hazard in pipeline - computer architecture: A hazard in pipeline .-removing a hazard frequently need that some instructions in the pipeline to be permitted to proceed as othe
Discuss different Routing plan adopted in a Telephone network. Hierarchical networks are able of handing heavy traffic where needed, and at similar time use minimal number of t
why they are essential in a bus oriented system? Ans) In a multiplexed bus system, many devices are linked to a common bus. If 2 or more devices attempt to use the bus at the si
Name the four steps in pipelining. Fetch : Read the instruction from the memory. Decode : Decode the instruction and get the source operand. Execute : Perform the operat
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