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How many bits must be decoded for chip select? What is the size of decoder when 128 × 8 RAM chips are required to provide a memory capacity of 2048 bytes?Ans. All higher order lines will be applied to decoder input that means that total 128 (27) locations are there and all location can store 8 bits. The no. of inputs to the decoder will be 11 - 7 = 4. And the decoder size will be 4x16. All 16 decoder outputs will be connected to the chip select input of single chips.
Define memory cycle time? It is the time delay needed between the initiations of two successive memory operations. Eg. The time among two successive read operations.
Q. Explain Micro-operations performed by CPU? The micro-operations performed by CPU can be categorized as: Micro-operations for data transfer from register-memory, re
Define seek time and latency time. The time taken by the head to move to the appropriate cylinder or track is known as seek time. Once the head is at right track, it must wai
Shared Memory Refers to the memory part of a computer system in which the memory can processed directly by any of the processors in the system. Distributed Memory Refer
Every computer connected to Internet has a unique address. Let's just say your IP address is 1.2.3.4 and you want to send a message to computer with IP address 5.6.7.8. Message you
Transfer Functions Change the last bilinear interpolated images and the original images into the frequency domain using the FFT. Try to measure the magnitude transfer functio
Define cache line. Cache block is used to refer to a set of contiguous address location of some size. Cache block is also referred to as cache line.
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Classical approach - Canonical genetic algorithm: However returning to the classical approach, as there example, whether solving a particular problem involved finding a set of
what is transistor?
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