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How many bits must be decoded for chip select? What is the size of decoder when 128 × 8 RAM chips are required to provide a memory capacity of 2048 bytes?Ans. All higher order lines will be applied to decoder input that means that total 128 (27) locations are there and all location can store 8 bits. The no. of inputs to the decoder will be 11 - 7 = 4. And the decoder size will be 4x16. All 16 decoder outputs will be connected to the chip select input of single chips.
Q. What is Master slave kernel? Master slave kernel: In this model just one of processors is assigned as Master. The master is in charge for subsequent activities: i)
Q. Explain Micro-operations performed by CPU? The micro-operations performed by CPU can be categorized as: Micro-operations for data transfer from register-memory, re
What are the risks by merchant's perspective in Electronic Payment Systems? Through merchant's perspective: • Copied or Forged payment instruments • Insufficient funds in
Example of Prolog: We can say that this is also true if there are four even numbers. Now we have our first rule: • If there are three or four even numbered cards, such play
SSTF stands for ? Ans. Shortest-Seek-time-first scheduling.
How many address bits are required to represent 4K memory ? Ans. 12 address bits are required for representing 4K memory, as 4K = 2 2 x 2 10 = 2 12 Therefore 1K = 1024
draw circuit diagram and the truth table that represent demultiplexer
Using D-Flip flops and waveforms explain the working of a 4-bit SISO shift register. Ans. Serial In-Serail Out Shift Register: Fig.(a) demonstrates a 4 bit serial in-serial out
Explain the working of Static RAM - Computer Memory? SRAM devices tender extremely fast access times (approximately four times faster than DRAM) but are much more expensive to
Relocatable programs? Ans. Relocatable programs can be loaded almost anywhere inside the memory.
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