History of parallel computers, Computer Engineering

Assignment Help:

History Of Parallel Computers

The test with and implementations of the utilize of parallelism started year back in the 1950s by the IBM.  The IBM enlarges computers also called as IBM 7030 was building in 1959.  In the design of these computers, a number of new ideas like overlapping I/O with processing and instruction look ahead were established.  A serious advance towards designing similar computers was going ahead with the development of ILLIAC IV in 1964 at the University of Illinois.  It had an only control unit but have multiple processing elements. On this machine, at a time, a one operation is executed on dissimilar data items by diverse processing elements. The idea of pipelining was begin in computer CDC 7600 in 1969.  It takes pipelined arithmetic unit.  In the years 1970 to 1985, the study in this area was decided on the development of vector super computer.  In 1976, the CRAY1 was determined by Seymour Cray.  Cray1 was a pioneering effort in the enlargement of vector registers. It accessed main memory only for store and load operations. Cray1 never use optimized pipelined arithmetic unit and virtual memory.  Cray1 had timer speed of 12.5 n.sec. The Cray1 processor evolved upto a speed of 12.5 Mflops on 100 × 100 linear equation solutions. The next invention of Cray called Cray XMP was introduced in the years 1982-84.  It was attached with 8-vector supercomputers and it is used a shared memory also.

Apart from Cray, the giant company developing, Control Data Corporation (CDC), parallel computers of USA, formed supercomputers, the CDC 7600. Its vector supercomputers named Cyber 205 had memory to memory architecture that is, input Vector operands were flow from the main memory to the vector arithmetic unit and the outputs were accumulated back in the main memory.  The benefit of this architecture was that It did not maximize the size of vector operands. The drawback was that it essential required a very high speed memory so that there would be no speed mismatch between main memory and vector arithmetic units.  Developing such high speed memory is very expensive. The Clock hustle of Cyber 205 was 20 n.sec. In the 1980s Japan also going ahead for manufacturing high performance vector supercomputers. Companies like, Fujitsu, Hitachi and NEC were the core manufacturers.  Hitach Established S-810/210 and S-810/10 vector supercomputers in 1982. All these equipment used semiconductor technologies to accomplish speeds at par with Cyber and Cray.  But their vectorisers and operating system were inferior than those of American companies.


Related Discussions:- History of parallel computers

Inheritance, what is Ambiguity in single inheritance

what is Ambiguity in single inheritance

Explain about programmer visible registers, Q. Explain about Programmer Vis...

Q. Explain about Programmer Visible Registers? Programmer Visible Registers: These registers can be employed by machine or assembly language programmers to minimize reference

What are the static and dynamic hazards in logic circuits, If for a short p...

If for a short period of time circuits goes to some dissimilar logic level then it is assumed to have then it is known as static hazard e.g. If the final logic value of output of a

Mplement a second-order low-pass filter using the finite dif, you will impl...

you will implement a second-order low-pass filter using the finite difference method. The finite difference method is a useful mathematical method that is used to numerically solve

Find the minimum sop and pos expression, Q.  Find the minimum SOP and POS e...

Q.  Find the minimum SOP and POS expression for the following functions using K- Map and realize the expression using appropriate gates. Also realize SOP form using NAND-to-NAND ga

Explain metadata, What is metadata? Metadata is data that explains anot...

What is metadata? Metadata is data that explains another data. Class definition is metadata. Models are inherently metadata as they explain the things being modeled.

Addressing mode, the 68000 has rich of addressing mode . it concerned with ...

the 68000 has rich of addressing mode . it concerned with the way data is accessed . identify the destion addressing mode for EXG D0, A2

Elements of information super highway infrastructure, Illustrate the elemen...

Illustrate the elements of Information Super Highway Infrastructure. The Information Superhighway is more than the Internet. This is a series of elements, including the collect

Types of structure charts, Types of Structure Charts Transaction struc...

Types of Structure Charts Transaction structure - control module calls subordinate modules, each of which handles a certain transaction More afferent processes Le

Salient points about addressing mode, Salient points about addressing mode ...

Salient points about addressing mode are:  This addressing mode is employed to initialise value of a variable. Benefit of this mode is that no extra memory accesses are

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd