History of parallel computers, Computer Engineering

Assignment Help:

History Of Parallel Computers

The test with and implementations of the utilize of parallelism started year back in the 1950s by the IBM.  The IBM enlarges computers also called as IBM 7030 was building in 1959.  In the design of these computers, a number of new ideas like overlapping I/O with processing and instruction look ahead were established.  A serious advance towards designing similar computers was going ahead with the development of ILLIAC IV in 1964 at the University of Illinois.  It had an only control unit but have multiple processing elements. On this machine, at a time, a one operation is executed on dissimilar data items by diverse processing elements. The idea of pipelining was begin in computer CDC 7600 in 1969.  It takes pipelined arithmetic unit.  In the years 1970 to 1985, the study in this area was decided on the development of vector super computer.  In 1976, the CRAY1 was determined by Seymour Cray.  Cray1 was a pioneering effort in the enlargement of vector registers. It accessed main memory only for store and load operations. Cray1 never use optimized pipelined arithmetic unit and virtual memory.  Cray1 had timer speed of 12.5 n.sec. The Cray1 processor evolved upto a speed of 12.5 Mflops on 100 × 100 linear equation solutions. The next invention of Cray called Cray XMP was introduced in the years 1982-84.  It was attached with 8-vector supercomputers and it is used a shared memory also.

Apart from Cray, the giant company developing, Control Data Corporation (CDC), parallel computers of USA, formed supercomputers, the CDC 7600. Its vector supercomputers named Cyber 205 had memory to memory architecture that is, input Vector operands were flow from the main memory to the vector arithmetic unit and the outputs were accumulated back in the main memory.  The benefit of this architecture was that It did not maximize the size of vector operands. The drawback was that it essential required a very high speed memory so that there would be no speed mismatch between main memory and vector arithmetic units.  Developing such high speed memory is very expensive. The Clock hustle of Cyber 205 was 20 n.sec. In the 1980s Japan also going ahead for manufacturing high performance vector supercomputers. Companies like, Fujitsu, Hitachi and NEC were the core manufacturers.  Hitach Established S-810/210 and S-810/10 vector supercomputers in 1982. All these equipment used semiconductor technologies to accomplish speeds at par with Cyber and Cray.  But their vectorisers and operating system were inferior than those of American companies.


Related Discussions:- History of parallel computers

What is a recursively enumerable language, What is a recursively enumerable...

What is a recursively enumerable language?            The languages that is accepted by TM is said to be recursively enumerable (r. e) languages.  Enumerable means that the stri

Send a report to the printer, How to send a report to the printer instead o...

How to send a report to the printer instead of displaying it on the screen? We can send a report to the printer instead of displaying it on the screen.  To do this, use the key

Illustrate role of world wide web in field of e-commerce, Illustrate the ro...

Illustrate the role of World Wide Web into the field of e-commerce. In the 1990 year, the advent of the World Wide Web upon the Internet represented a turning point into e-com

Register transfer - computer architecture, Register transfer - computer arc...

Register transfer - computer architecture: Register transfer: The output and input gates for register Ri are controlled by the signals Riout and Riin respectively.

Explain the operation of JK flip flop when all inputs are 0, Write the trut...

Write the truth table for a clocked J-K flip-flop that is triggered by the positive-going edge of the clock signal. Explain the operation of this flip-flop for the following condit

Pseudocode, 1 1 1 1 2 1 1 3 3 1 1 4 6 4 1

1 1 1 1 2 1 1 3 3 1 1 4 6 4 1

Explain vector-vector instructions, Vector-Vector Instructions In this...

Vector-Vector Instructions In this category, vector operands are fetched from vector register and accumulated in another vector register. These instructions are indicated with

Pc cross assembler, 1.0 By working throughthe first time guide this will ga...

1.0 By working throughthe first time guide this will gain familiarity with the on board monitor and the PC cross assembler  After connecting the system to the terminal program,

Finite state automaton, Once a finite state automaton (FSA) is designed, it...

Once a finite state automaton (FSA) is designed, its transition diagram can be translated in a straightforward manner into program code. However, this translation process is consid

Explain differences between folded and non-folded network, Explain differen...

Explain differences between folded and non-folded network. Folded network: While all the inlets/outlets are connected to the subscriber lines, the logical connection shows as

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd