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Q. Explain the Fetch Cycle?
The beginning of every instruction cycle is the fetch cycle and causes an instruction tobe fetched from memory.
The fetch cycle comprises four micro-operations which are executed in three timing steps. The fetch cycle can be written as:
T1: MAR ← PC
T2: MBR ← [MAR]
PC ← PC + I
T3: IR ← MBR
Where I is the instruction length. We presume that a clock is available for timing purposes and that it produces regularly spaced clock pulses. Every clock pulse defines a time unit. So all the units are of equal duration. Every micro-operation can be performed within the time of a single time unit. Notation (T1, T2, T3) represents successive time units. What is done in these time units?
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