Q. Explain the Fetch Cycle?

The beginning of every instruction cycle is the fetch cycle and causes an instruction tobe fetched from memory.  

The fetch cycle comprises four micro-operations which are executed in three timing steps. The fetch cycle can be written as:

T1:  MAR ← PC

T2:  MBR ← [MAR]

         PC    ← PC + I

T3:  IR      ← MBR

Where I is the instruction length. We presume that a clock is available for timing purposes and that it produces regularly spaced clock pulses. Every clock pulse defines a time unit. So all the units are of equal duration. Every micro-operation can be performed within the time of a single time unit. Notation (T₁, T₂, T₃) represents successive time units. What is done in these time units?

• In the first time unit the content of PC is moved to MAR.
• In the second time unit contents of memory location specified by MAR is moved to MBR and contents of PC is incremented by I.
• In the third time unit content of MBR is moved to IR.