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There are situations, called hazards that stop the next instruction in the instruction stream from implementing during its designated clock cycle. Hazards decrease the performance from the ideal speedup gained by pipelining. There are three classes of Hazards:
1. Structural Hazards: It happens from resource conflicts when the hardware cannot support all possible combinations of instructions simultaneously in overlapped implementation.
2. Data Hazards: It happens when an instruction depends on the results of last instruction in a way that is exposed by the overlapping of instructions in the pipeline.
3. Control Hazards: It happens from the pipelining of branches and other instructions that change the PC.
Binary Constraints: Alternatively unary constraints specify that a particular variable can take certain values that basically restricts the domain for that variable thus shoul
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How does CPU know that an interrupt has taken place? There needs to be a line or a register or status word in CPU which can be increased on occurrence of interrupt situation.
What is virtual memory? Method that automatically move program and datablocks into the physical main memory when they are needed for execution are known as virtual memory.
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