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Explain the Parallel In - Parallel Out Shift Registers?
For "parallel in - parallel out" shift registers all data bits show on the parallel outputs immediately following the simultaneous entry of the data bits.
The following circuit is a "four-bit parallel in - parallel out shift register" constructed through D flip-flops.
The Q's are the parallel outputs and The D's are the parallel inputs. Once the register is clocked then all the data at the D inputs appear at the corresponding Q outputs simultaneously.
To design a VI that can be used to show how the voltage falls across a resistor in a simple CR circuit when excited by a step function. The title of the VI will be Capacitor Res
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