Explain loop level of parallel processing, Computer Engineering

Assignment Help:

Loop Level

At this stage, following loop iterations are candidates for parallel execution. Though, data dependencies among subsequent iterations can restrict parallel execution of instructions at loop level. There is vast scope for parallel execution at loop level. 

Illustration: In the subsequent loop in C language,

                        For (i=0; i <= n; i++)

                        A (i) = B (i) + C (i)

Each of the instruction A (i) =B (i) + C (i) may be implemented by different processing elements provided there are at least n processing elements. Though, the instructions in the loop

 

                        For (J=0; J<= n; J++)

                        A (J) = A (J-1) + B (J)  

Cannot be executed parallely as A (J) is data dependent on A (J-1).  It implies that before using the loop level parallelism the data dependencies should be checked.

 


Related Discussions:- Explain loop level of parallel processing

What is trp, TRP is the number of clock cycles required to terminate access...

TRP is the number of clock cycles required to terminate access to an open row of memory, and open access to the next row. It stand for row precharge time.

What do you mean by true complement method, Q. What do you mean by True Com...

Q. What do you mean by True Complement Method? Explain in detail. Q. Show IEEE format for (12.75)10. Q. What are the various ways to represent Negative Numbers in computer sy

Pre-os and runtime sub-os functionality, In a raw Itanium, a "Processor Abs...

In a raw Itanium, a "Processor Abstraction Layer" (PAL) is integrated into the system. When it is booted the PAL is loaded into the CPU and gives a low-level interface that abstrac

Detrmine pure paging, Which is not a key piece of information, stored in si...

Which is not a key piece of information, stored in single page table entry, assuming pure paging and virtual memory Ans. A reference for the disk block which stores the page is

How to create a bugzilla account? , 1. Enter your "E-mail address...

1. Enter your "E-mail address" and "Real Name" (or whatever name you need to call yourself) in the spaces given, then select the "Create Account" button. 2. Within moments, you

Explain excess-3 and gray code using four binary digitis, Give the details ...

Give the details of excess 3 codes and gray code using four binary digits. Ans: Table of excess 3 codes and gray code using four binary digits Binary

What are the two types of branch prediction techniques, What are the two ty...

What are the two types of branch prediction techniques available?  The two types of branch prediction methods are  1) Static branch prediction  2) Dynamic branch predicti

What are the events used for page headers and footers, What are the events ...

What are the events used for page headers and footers? The events TOP-OF-PAGE and END-OF-PAGE are used for pager headers and footers.

Integrating virtual memory, Integrating Virtual Memory, TLBs, and Caches - ...

Integrating Virtual Memory, TLBs, and Caches - computer architecture:   There are 3 types of misses: 1. a cache miss 2. TLB miss 3. a page fault 2 techniqu

COMPUTER SYSTEM, Classify computer systems according to capacity. How they ...

Classify computer systems according to capacity. How they are different from computers according to the classification of technology. Provide comparative study also.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd