Instruction Level

It refers to condition where different instructions of a program are implemented by different processing elements. Most processors have various execution units and can implement various instructions (generally machine level) at the same time. Good compilers may reorder instructions to make the most of instruction throughput. Often a processor itself is able to do this. Current processors even parallelize execution of micro steps of instructions within the same pipe. The initial use of instruction level parallelism in designing PE's to improve processing pace is pipelining.  Pipelining was broadly used in early 'Reduced Instruction Set Computer (RISC).'  After RISC, super scalar processors were created which execute multiple instructions in single clock cycle.  The super scalar processor design uses the parallelism available at instruction level by improving number of arithmetic and functional units in PE's.  The idea of instruction level parallelism was further edited and applied in design of Very Large Instruction Word (VLIW) processor, in which one instruction word encodes more than one operation.  The concept of implementing some instructions of a program in parallel by scheduling them on a single processor has been a key driving force in the design of current processors.