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Q. Explain about Interrupt Cycle?
On completion of execute cycle the current instruction execution gets completed. At this point a test is made to conclude whether any enabled interrupts have occurred. If so interrupt cycle is performed. This cycle doesn't execute an interrupt however causes start of execution of Interrupt Service Program (ISR). Please note the ISR is executed as just another program instruction cycle. Nature of this cycle differs greatly from one machine to another. A typical sequence of micro-operations of interrupt cycle are:
T1: MBR ← PC
T2: MAR←Save-Address
PC ←ISR- Address
T3: [MAR] ← MBR
At time T1 contents of the PC are transferred to MBR so that they can be saved for return from the interrupt. At time T2 MAR is loaded with address at which contents of PC are to be saved, and PC is loaded with address of start of the interrupt-servicing routine. At instance T3 MBR that comprises old value of the PC is stored in memory. Processor is now ready to begin subsequent instruction cycle.
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