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Differentiate the latch and flip-flop?
The major difference between latch and FF is which latches is level sensitive whereas FF is edge sensitive. They both need the use of clock signal and are used within sequential logic. The output tracks the input for a latch while the clock signal is high, therefore as long as the clock is logic 1, the output can change when the input also changes. FF onto the other hand will store the input only while there is a rising/falling edge of the clock. Latch is sensitive to glitches onto enable pin, while flip-flop is immune to glitches. Latches obtain fewer gates also less power to implement than flip-flops. Considerably latches are faster than flip-flops.
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how can we bimpliment half substractor using nand gate
need tutorial on data paralellism.
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