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Q. Which of the 3 transistor configuration is best to use in cascade if maximum voltage gain is to be realized? The common collector configuration is not used for intermediate
Q. A balanced delta-connected load with a per-phase impedance of 30+j10 is connected in parallel with a balanced wye-connected load with a per phase impedance of 40-j10 . This l
Q. Block schematic diagram of SS7? Levels are as below: Level 1: The Physical Layer Level 2: The Data Link Level Level 3: The signaling network level Level 4: The User Pa
Q. In order to minimize output voltage offsets in practical op-amp circuits, one provides a dc path from each input terminal to ground, makes each input terminal see the same exter
Flow of electrons - Electrons flow down a wire that is what current, is. Good conductors like copper and silver and aluminum have free electrons in their outer shells, and they jum
Q. A 6 - pole, DC armature with 36 slots and 2 coil - slides/slot is to be wave wound (double layer). Calculate the back pitch, front - pitch and commentator pitch. How many dumm
The contents of compressed gas cylinders can range from highly flammable substances, such as hydrogen, propane and ethane (acetylene), to toxic gases, such as chlorine, sulphur dio
Consider an electromagnet, as shown in Figure, which is used to support a solid piece of steel and is excited by a coil of N = 1000 turns carrying a current i = 1.5 A. The cross-se
Q. Draw the common source drain and transfer characteristics of a JFET. How are they useful? The graph below shows variation of the drain current Id as a function of the drain
DESIGN SR LATCH WITH UNIVARSAL LOGIC GATES.DRAW AND EXPLAIN THE LOGIC DIAGRAMS
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