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For the circuit of Fig:
(i) using Kirchoff's Laws, find all the currents
(ii) determine the voltage across each resistor and check that all loops comply with KVL
(iii) what value of resistor, R, will give v = 0?
Explain and drive the expression for fixed bias and potential divider.
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Measurements made on the self-biased n-channel JFET shown in Figure are V GS =-1 V, I D = 4 mA; V GS =-0.5V, I D = 6.25 mA; and V DD = 15 V. (a) Determine V P and I DSS .
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