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Q. Describe about Address Space and Memory Space?
An address used by a programmer will be termed as a virtual address and set of such addresses the address space. An address in main memory is known as a physical address. The set of these locations is termed as memory space. So address space is set of addresses produced by programs as they reference instructions and data, memory space comprises actual main memory locations directly addressable for processing.
Supposes a computer which has a main-memory capacity of 64K words (K=1024). 16-bits are required to specify a physical address in memory because 64K = 216. Assume that computer has auxiliary memory for storing information equivalent to capacity of 16 main memories. Let's signify address space by N and memory space by M we then have for this illustration: N = 16 × 64 K = 1024K and M = 64K.
In a multiprogramming computer system, data and programs are transferred to and from auxiliary memory and main memory based on demands obliged by CPU. Suppose program 1 is currently being executed in CPU. Program 1 and a part of its associated data are moved from secondary memory in the main memory as displayed in Figure below. Parts of programs and data require not being in contiguous locations in memory because information is being moved in and out and empty spaces may be available in scattered locations in memory.
Figure: Address and Memory Space in Virtual Memory
In our illustration address field of an instruction code will comprise 20 bits however physical memory addresses should be specified with just 16-bits. So CPU will reference data and instructions with a 20 bits address though information at this address should be taken from physical memory since access to auxiliary storage for particular words will be prohibitively long. A mapping table is then required as displayed in Figure below to map a virtual address of 20 bits to a physical address of 16 bits. Mapping is a dynamic operation that means every address is translated instantly as a word is referenced by CPU.
Figure: Memory table for mapping a virtual table
How many AND gates are required to realize Y = CD+EF+G ? Ans. Y = CD + EF + G for realize this two AND gates are needed (for CD and EF).
what can be different assignments given on this topic?
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