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Q. Counter-controlled analog to digital converter?
Figure shows the block diagram of a counter-controlledA/Dconverter. Resetting the binary counter to zero produces D/A output voltage V2 = 0 and initiates the analog-to-digital conversion. When the analog input V1 is larger than the DAC (D/A converter) output voltage, the comparator output will be high, thereby enabling the AND gate and incrementing the counter. V2 is increased
as the counter gets incremented; when V2 is slightly greater than the analog input signal, the comparator signal becomes low, thereby causing the AND gate to stop the counter. The counter output at this point becomes the digital representation of the analog input signal. The relatively long conversion time needed to encode the analog input signal is the major disadvantage of this method.
Determine the form factor and peak factor: Determine the form factor and peak factor for the above half rectified wave. Solution From the above example, I rms =
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A coil of inductance 0.04 H and resistance 10? is connected to a 120 V, d.c. supply. Verify (a) The final value of current (b) The time constant of the circuit (c)
Connection of Shunt Capacitors - Across Individual Customers The most appropriate manner of improving PF of the distribution system and thereby reducing line losses is to link
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Determine the active - reactive and apparent power: In the given circuit, determine the active, reactive and apparent power. Figure Solution The inductive
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