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Q. Counter-controlled analog to digital converter?
Figure shows the block diagram of a counter-controlledA/Dconverter. Resetting the binary counter to zero produces D/A output voltage V2 = 0 and initiates the analog-to-digital conversion. When the analog input V1 is larger than the DAC (D/A converter) output voltage, the comparator output will be high, thereby enabling the AND gate and incrementing the counter. V2 is increased
as the counter gets incremented; when V2 is slightly greater than the analog input signal, the comparator signal becomes low, thereby causing the AND gate to stop the counter. The counter output at this point becomes the digital representation of the analog input signal. The relatively long conversion time needed to encode the analog input signal is the major disadvantage of this method.
Q. The energy stored in a 2-µH inductor is given by wL(t) = 9e-2t µJ for t ≥ 0. Find the inductor current and voltage at t = 1 s.
Q. The full-wave rectified waveform, approximated by the first three terms of its Fourier series, is given by v (ωt) = V m sin (ωt/2), for 0 ≤ ωt ≤ 2π, and where V m = 100
Q. A three-phase load, connected to a 440-V bus, draws 120 kWat a power factor of 0.85 lagging. In parallel with this load is a three-phase capacitor bank that is rated 50 kVAR . D
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what is use of dummy coil in DC m/c????
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