Convert the given S-R flipflop to a D-flip flop.

Ans:

The Truth Table for S-R Flip-Flop is illustrated in Fig.(a) and truth table of D Flip-Flop is illustrated in Fig.(b)

Fig.(a) Truth Table for S-R Flip-Flop    Fig.(b) Truth Table for D-Flip-Flop

If we utilize only the middle two rows of the truth table of the S-R Flip-Flop demonstrated in Fig.(a) then we get a D-type Flip-Flop as demonstrated in Fig.(b) and (d). This has only one input termed to as D-input or Data Input. Truth table of its given in Fig.(b) from that this is clear that the output Qn+1 at the end of the clock pulse equivalents the input D_n before the clock pulse. Here is equivalent to saying that the input data shows at the output at the end of the clock pulse. Therefore, the transfer of data from the input to the output is delayed and thus the name Delay (D) Flip-Flop. The D-type Flip-Flop is either utilized as a Delay Device or like a Latch to store 1-bit of binary information.

                          Fig. (c) S-R Flip-Flop converted into a D-Flip-Flop            Fig. (d) Logic Symbol of D Flip-Flop