Concurrently read concurrently write, Computer Engineering

Assignment Help:

Q. Concurrently read concurrently write?

It is one of the models derived from PRAM. In this model the processors access the memory locations simultaneously for reading and writing operations. In this algorithm that uses CRCW model of computation, n3 number of processors is used. Whenever a simultaneous write operation is executed on a particular memory location let's say m than there are odds of occurrence of a conflict. So the write conflicts it implies that (WR, RW, WW) have been resolved in the subsequent manner. In a condition when more than one processor attempts to write on same memory location, the value stored in memory location is always the sum of values computed by different processors.

Algorithm Matrix Multiplication using CRCW

Input// Two Matrices M1 and M2

For I=1 to n                                  //Operation performed in PARALLEL

      For j=1 to n                          //Operation performed in PARALLEL 

         For k=1 to n                    //Operation performed in PARALLEL

               Oij = 0;

               Oij = M1ik * M2kj

               End For

       End For 

End For

The complexity of CRCW based algorithm is O(1).


Related Discussions:- Concurrently read concurrently write

Other equivalences, Equivalences: In this following miscellaneous equi...

Equivalences: In this following miscellaneous equivalence rules are often useful during rewriting sessions. So there the first two allow us to completely get rid of implicatio

Write shorts notes on digital signature, Write shorts notes on Digital Si...

Write shorts notes on Digital Signature. This method is used to authenticate the sender of a message. For sign a message, the sender encrypts the message by using a key ident

Data structures for parallel algorithms, To apply any algorithm selection o...

To apply any algorithm selection of a proper data structure is very significant. An explicit operation might be performed with a data structure in a smaller time however it might n

Common functions of interrupts - computer architecture, Common Functions of...

Common Functions of Interrupts: An Interrupt transfers control to the interrupt service routine, generally through the interrupt vector table, which contains the addresses

Register-to-register operands in RISC, Q. Register-to-register operands in ...

Q. Register-to-register operands in RISC? Register-to-register operands: In RISC machines operation which access memories are LOAD and STORE. All other operands are kept in reg

Discuss about charles babbage in brief, Discuss about Charles Babbagein bri...

Discuss about Charles Babbagein brief Mechanism  for  advancing  or  reversing  of  control  card  were  allowed  therefore enabling execution of any desired instruction. In ot

Define synchronous bus, Define synchronous bus. Synchronous buses are t...

Define synchronous bus. Synchronous buses are the ones in which every item is transferred during a time slot(clock cycle) known to both the source and destination units. Synchr

What is clr, What is CLR?  CLR is .NET equivalent of Java Virtual Mach...

What is CLR?  CLR is .NET equivalent of Java Virtual Machine (JVM). It is the runtime that changes a MSIL code into the host machine language code, which is then implemented a

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd