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Branch (control) hazards in computer architecture:
Branching hazards (also called control hazards) take place when the processor is told to branch -for example, if a definite condition is true, then jump instruction from 1 part of the instruction stream to another - not essentially to the next instruction sequentially. In such type of case, the processor unable to tell in advance whether it should process the next instruction (instead it may have to move to a distant instruction).
It can result in the processor doing not needed actions.
A cache misses:- A cache miss stalls all of the instructions on pipeline before and after both condition the instruction causing the miss.
Data logging This technique involves collecting data automatically using sensors; frequently used when doing scientific experiments or monitoring a system.
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ascii code add=2unit,replace=1unit,delete=3unit.convert ascii code in minimum cost
what are the different way of executing pipelines
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