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Q. Explain the basic architecture of digital switching systems. Explain in detail companding.
Ans:
A simple N X N time division space switch is displayed in Figure. Switch can be represented in an equivalence form as a two-stage network with N X 1 and 1 X N switching matrices for first and second stages corresponding as displayed in Figure. Network has one link interconnecting the two stages. Every inlet/outlet is a single speech circuit corresponding to a subscriber line. Speech is carried as PAManalogue samples or PCM digital samples, occurring at 125-µs intervals. When PAM samples are switched in a time division manner, switching is called analogue time division switching. If PCM binary samples switched, then switching is termed as digital time division switching. In Figure, the interconnected by a suitable control mechanism and speech sample transferred from the inlet to the outlet.
Q. (a) Draw the logic diagram of the enabled D latch using only NAND gates. (b) Complete the timing diagram of Figure (a) of theDlatchwhose block diagram and truth table are giv
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