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Consider that a list of record or a table is stored in the memory and you wish to find some information in that particular list. E.g. the list comprises three fields as displayed below:
Assume that we want to find the age and ID number of Ravi. If we use conventional RAM, it is essential to give the exact physical address of entry associated to Ravi in the instruction access entry such as:
READ ROW 3
Another alternative idea is that we explore the whole list by means of the Name field as an address in instruction like:
READ NAME = RAVI
Again with serial access memory this option may be implemented simply but it's a very slow process. An associative memory assists at this point and concurrently examines all the entries in the list and returns the desired list very rapidly. SIMD array computers have been developed with associative memory. This memory is content addressable memory by which it's meant that multiple memory words are accessible concurrently. The parallel accessing feature support parallel search and parallel compare too. This ability can be used in numerous applications like:
The inherent parallelism characteristic of this memory has huge advantages and impact in parallel computer architecture. The associative memory is expensive compared to RAM. The array processor built with associative memory is termed as Associative array processor. In this section we explain a number of categories of associative array processor. Kinds of associative processors are based on organisation of associative memory. So first we discuss about associative memory organisation.
Explain the number unobtainable tone in strowger telephony with waveforms and the timings. In the following figure illustrates the number unobtainable tone that is continuous
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Using CICS Transaction Gateway we can join MQ Series with Power Builder 8.0
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The LOOP-ENDLOOP on extract datasets can be used without any kind of errors False. It causes runtime errors.
What is a disk drive? The electro mechanical mechanism that spins the disk and moves the read/write heads known as disk drive.
Explain the differences of casex and casez over the case statement? casex operator has to be used when both high impedance value (z) and unknown (x) in any bit has to be t
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Now let's define range which a normalised mantissa can signify. Let's presume that our present representations has normalised mantissa so left most bit can't be zero so it has to b
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