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Consider that a list of record or a table is stored in the memory and you wish to find some information in that particular list. E.g. the list comprises three fields as displayed below:
Assume that we want to find the age and ID number of Ravi. If we use conventional RAM, it is essential to give the exact physical address of entry associated to Ravi in the instruction access entry such as:
READ ROW 3
Another alternative idea is that we explore the whole list by means of the Name field as an address in instruction like:
READ NAME = RAVI
Again with serial access memory this option may be implemented simply but it's a very slow process. An associative memory assists at this point and concurrently examines all the entries in the list and returns the desired list very rapidly. SIMD array computers have been developed with associative memory. This memory is content addressable memory by which it's meant that multiple memory words are accessible concurrently. The parallel accessing feature support parallel search and parallel compare too. This ability can be used in numerous applications like:
The inherent parallelism characteristic of this memory has huge advantages and impact in parallel computer architecture. The associative memory is expensive compared to RAM. The array processor built with associative memory is termed as Associative array processor. In this section we explain a number of categories of associative array processor. Kinds of associative processors are based on organisation of associative memory. So first we discuss about associative memory organisation.
Function Modules are also external Subroutines. True.
Explain definition of fibonacci Where an input value gives a trivial result, it is returned directly, otherwise the function calls itself, passing a changed version of the inpu
Q. Describe the Limitation of FAT16? DOS designers decided to use clusters with as a minimum four sectors in them (so a cluster size of at least 2KB) for all FAT16 hard disks.
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what is transistor?
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Instruction level This is the initial level and the degree of parallelism is uppermost at this level. The fine grain size is used at statement or instruction level as only few
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