Which would expect to have a bigger effect on cmos circuit

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Which would you expect to have a bigger effect on the power consumption of a CMOS circuit, a 5% increase in power-supply voltage or a 5% increase in internal and load capacitance?

Reference no: EM13294514

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Which would expect to have a bigger effect on cmos circuit : Which would you expect to have a bigger effect on the power consumption of a CMOS circuit, a 5% increase in power-supply voltage or a 5% increase in internal and load capacitance
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