What should the two miss rates be so that the average data

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Question :

In a two-level cache system, cycle times of L1 and L2 caches and main memory are 1, 8 and 64 clock cycles, respectively. The miss rate of L2 cache is twice that of L1.

What should the two miss rates be so that the average data access time of this cache system is 2 cycles?

Reference no: EM132153535

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