Obtain the logic diagram of a master- slave j-k flip flop

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Reference no: EM131205382

DIGITAL FUNDAMENTALS

Part A-

Q1: In which of the following base systems is 123 not a valid number?

(a) Base 10

(b) Base 16

(d) Base 3

Q2: A NAND gate is called a universal logic element because

(a) it is used by everybody

(b) any logic function can be realized by NAND gates alone

(d) many digital computers use NAND gates.

Q3: Most of the digital computers do not have floating point hardware because

(a) floating point hardware is costly

(b) it is slower than software

(d) of no specific reason.

Q4: Positive logic in a logic circuit is one in which

(a) logic 0 and 1 are represented by 0 and positive voltage respectively

(b) logic 0 and, -1 are represented by negative and positive voltages respectively

(d) logic 0 voltage level is lower than logic 1 voltage level.

Q5: Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit synchronous counter is

(a) TTLAS

(b) CMOS

(d) TTLLS

Q6: SR Flip flop can be converted to T-type flip-flop if ?

(a) S is connected to Q

(b) R is connected to Q

(d) S and R are connected to Q and Q' respectively

Q7: Register is a?

(a) Set of capacitor used to register input instructions in a digital computer

(b) Set of paper tapes and cards put in a file

(d) Part of the auxiliary memory

Q8: For which of the following flip-flop the output clearly defined for all combinations of two inputs?

(a) Q type flip-flop

(b) J K flip-flop

(d) T flip-flop

Q9: What is a digital-to-analog converter?

(a) It allows the use of cheaper analog techniques, which are always simpler.

(b) It takes the digital information from an audio CD and converts it to a usable form.

(d) It stores digital data on a hard drive.

Q10: The output of an OR gate is LOW when ________.

(a) all inputs are LOW

(b) any input is HIGH

(d) All inputs are HIGH

Q11: (a) What are minterms and maxterms? Minimize the Boolean function F=(X+X' .Y)

(b) Minimise the following problems using the Karnaugh maps.

(i) X = f(A,B,C) = A'B'C' + A'B + ABC'+AC

(ii) X = f(A,B,C) = A'B + BC' + BC + AB'C'

Q12: (a) Show how a full-adder can be converted to a full-subtractor with the addition of one inverted circuit.

(b) Design a combinational circuit to convert a 8-4-2-1 code to excess-3 code.

Q13: (a) Explain the different triggering techniques of flip-flops.

(b) Explain the working of a T flip flop.

Q14: Discuss the following in detail:

(a) Shift-registers.

(b) Multiplexers.

Q15: (a) Design four-bit ring counter using D flip-flops.

(b) Discuss the differences between combinational circuits and sequential circuits.

Part B-

Q1. (a) Obtain the logic diagram of a master- slave J-K flip flop with AND and NOR gates.

(b) Design a counter with the following binary sequence 0,1,3,7,6,4 and repeat .use T flip-flop.

Q2. (a)What is mantissa and exponent ? Give suitable example.

(b) Design a 6-bit ring counter using J-K flip-flops

Q3. (a) Answer the following.

(1) What do you mean by minterm&maxterm

(2) What is a four bit binary parallel adder?

(b) Design a counter with following binary sequence 0,1,4,2,6 and repeat .Use JK flip-flop.

Q4. (a) Design a MOD-18 ripple counter using J-K flip-flop.

(b) Give the block diagram of processor unit and explain the function of different blocks.

Q5. (a) An eight -bit binary ripple UP counter with a modulus of 256 is holding the count 01111111 what will be the count after 135 clock pulses be?

(b) Design a logic diagram for an addition /subtraction circuit, using a control variable P such that this operates as a full -adder when P=0 and as a full-subtractor for P=1

Signals & Systems

Q1: State whether the following statements are true or false and justify your statement?

(a) The series interconnection of two linear time-invariant systems is itself a linear, time-invariant system?

(b) The series interconnection of two nonlinear systems is itself nonlinear?

Q2: A particular first-order casual and stable discrete-time LTI system has a step response whose maximum overshoot is 50% of its final value. If the final value is 1, determine a difference equation relating the input x[n] and output y[n] of this filter?

Q3: The Laplace transform X(s) of a signal x(t) has four poles and an unknown number of zeros. The signal x(t) is known to have an impulse at t = 0. Determine what information, if any, this provides about the number of zeros and their locations?

Q4: Let x(t) be a signal that has a rational Laplace transform with exactly two poles, located at s = -1 and s = -3. If g(t) = e^2t x(t) and G (jw) [ the Fourier transform of g(t)] converges, determine whether x(t) is left sided, right sided, or two sided?

Q5: Let x[n] be an absolutely summable signal with rational z-transform X(z). If X(z) is known to have a pole at z= ½, could x[n] be

(a) a finite-duration signal?

(b) a left-sided signal?

(d) A two-sided signal?

Q6: Consider a feedback system, either in continous-time or discrete-time, and suppose that the Nyquist plot for the system passes throughthe point -1/K. Is the feedback system stable or unstable for this value of the gain? Explain your answer?

LINEAR CIRUCUITS

Q1: (a) Which is the fastest adc and why?

(b) How many levels are possible in a two-bit dac? What is it's resolution if the output range is 0 to 3 v?

Q2: (a) What is the range of modulating input voltage applied to a vco?

(b) Draw the circuit of a pll am detector and explain it's operations.

Q3: (a) Give the conversation time for

(1) counting adc

(2) successive approximation adc

(3) dual-slope adc.

(b) show with the hell of circuit diagram an op-amp used as

(i) scale schanger,

(ii) phase shifter,

(iii) inverting adder

(iv) non inverting adder.draw an op-amp circuit whose output is v1+v2-v3-v4.

Q4: (a) What are the modes of operations of a timer?

(b) What is the principle switch mode power supplies? Discuss it's advantages and disadvantages.

Q5: (a) Desire the transfer function of a second order bp filter using ota's.

(b) Explain the operation offer squar wave generator bye drawing the capacitor and output voltage waveforms.

Q6: (a) List the non-ideal dc characteristics of an op-amp.

(b) What is bode plot?

(d) Name the technology used for the fabrication of transistors or ics.

Reference no: EM131205382

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