How is the memory address to be interpreted

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Reference no: EM132117264

This question investigates cache use in different types of cache. Consider a system of 8Kbytes of byte-addressable main memory partitioned into blocks of 32bytes each.

The system has cache of size 512bytes. The main memory blocks are being accessed in the order shown in the tables (the numbers are in decimal). Assuming the cache is empty at the start.

Scenario : The system uses fully associative cache and first-in-first-out replacement policy.

How is the memory address to be interpreted?

Address field

Value

Reason

Word field length:



Tag field length:



Show whether each memory block access is a hit or a miss. Then compute the hit ratio.

Memory

block

Address

Tag field

Address

Word field

Maps to

cache block

Hit/Miss

1





5





21





7





5





1





17





7





17





5





Total


Reference no: EM132117264

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