Reference no: EM131665950
Assignment: Digital Systems Laboratory
Pre-Lab
PURPOSE:
To become familiar with a simple adder circuit.
PRE-LAB READINGS AND EXERCISES:
Prior to the lab period, perform the following readings and exercises.
Reading:
Review information (on combinational circuits, specifically the half and full adder circuits, carry propagation and on the analysis and design procedure of combinational circuits) in the ECE 215 textbook.
Exercises:
a. Draw the diagram of a Half Adder (HA) circuit using NAND gates only and simulate its operation using the Quartus software by generating waveforms.
i. Develop truth table for Half Adder
ii. Determine Boolean functions
iii. Determine Boolean functions in NAND Gate form
iv. Draw diagram for the Half Adder
v. Simulate in Quartus
b. Implement design #1 of the Full Adder (FA) circuit shown in Figure 4-1 below using Quartus.
Figure 4-1 --- Design #1 of the Full Adder Circuit
c. Implement design #2 of the Full Adder (FA) circuit show in Figure 4-2 below using Quartus.
Figure 4-2 --- Design #2 of the Full Adder Circuit
d. Compare the waveform results from parts b and c.
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