Draw such a circuit or explain why one cannot be built

Reference no: EM131317205

1. Is it possible for a one-input, one-output combinational circuit built entirely of two-input NAND gates to contain a hazard? Either draw such a circuit or explain why one cannot be built.

2. Is it possible for a Combinational circuit built entirely of AND and OR gates to contain a hazard? Either draw such a circuit or explain why one cannot be built.

Reference no: EM131317205

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