Design and simulation of a simple cpu architecture

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Reference no: EM131486731

Laboratory Project

Design and Simulation of a Simple CPU Architecture

Objective

This project consists of a series of assignments that will guide the students to the step-by-step approach in building their own simple CPU architecture. A logic circuit simulator such as LogicWorks will be used to implement the designed circuit. The aim of this project is to:
- Gain an insight into the layers of computer organization from the digital logic level up to the assembly language level.
- Design and verify the various microoperations that can be implemented with the data path unit of the CPU.
- Provide a team of students with an opportunity to work on a more open-ended CPU design problem.

This lab activity is an open ended design project in the sense that each group of students have to come up with their own CPU design using a set of guidelines provided in this assignment. Students are encouraged to design an efficient and elegant approach in designing the different components of the datapath unit. All assumptions and design approach must be clearly explained in the laboratory report.

Part 1: Design and Implementation of the CPU Datapath

Datapath specification

The following specifications must be achieved by the datapath of the 8-bit CPU to be designed:

Function Unit:
The function unit receives data from two 8-bit buses A and B.

Inputs:

Control word: 16 bits
Constant in: 8-bit operand that can be fed to the function unit
Data in: 8-bit external data that can be loaded into any register

Outputs:

Data out: 8-bit Output from Bus A
Address out: 8-bit Output from Bus B
Status bits: Carry (C), Sign (N), Overflow (V), Zero (Z)

The arithmetic circuit:

Generates the following eight arithmetic operations according to two selection lines S1, S0 in conjunction with carry Cin

S1	S0
S1	S0
0	0	Add	A + B		A + B + 1
0	1	Transfer A	A	Increment	A + 1
1	0	1's complement	B'	2;s complement	B' + 1
1	1		A + B'	Subtract	A + B' + 1

The Logic unit:

Generates the following operations according to the two selection lines S1, S0:

S₁	S₀	Logic Function
0	0	A ^ B
0	1	A ? B
1	0	A B
1	1	A'

Project Requirements

A. Design, simulate and verify the functionality of the ALU and Shifter Unit and check the status bits. (For the ALU, design a 1-bit arithmetic unit and 1-bit logic unit, then use them to generate 8-bits ALU)

B. Design, simulate and verify the operation of the register file.

C. Specify the 16-bit control word that must be applied to your datapath to implement each of the following microoperations:

1) R0 ← 28 H

2) R1 ← BC H

3) R2 ← AD H

4) R3 ← A5 H

5) R4 ← 39 H

6) R5 ← F5 H

7) R6 ← 6A H

8) R7 ← 90 H

9) R4 ← R2 + FF H

10) R1 ← sr R2

11) R6 ← R5 - 1

12) R2 ← R2 ^ R5

13) R1 ← R2 R4

14) R0 ← R3 - 1

15) R2 ← R2 - R5

16) R0 ← - R1

17) Data out ← R7 18) R4 ← 0

D. Apply the above microoperations to your circuit and record the generated output in a table.

Report

The report is an important part of the project. It must be clear and well organized. It is the only way to convey that you did a great job in the lab. You have to submit a lab report that contains the following:

- Course Title, Lab no, Lab title, Team members and date of submission

Section on the lab experiment:

1) The project objectives.

Explanation of the design approach for each unit with its schematic circuit captured from the simulator. Present the circuits in a buttom-up approach.

2) A schematic that shows the different fields of the 16-bit control word

3) The 16-bit control word that must be applied to the datapath to implement the sequence of microoperations listed in the example above.

4) A printout of the timing diagram generated by the simulator when the above set of microoperations are applied to the data path.

5) Analysis of the results indicating that the circuit functions properly.

Conclusion and discussion

Discuss the results obtained. What problems did you face in the design? How did you solve them? How to improve your design? What did you learn from this assignment.

Reference no: EM131486731

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