Design an inverting integrator with an input resistance

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Reference no: EM131860515

Basic Electronics Circuits

1. Find values for the resistances in the circuit of Fig. 1 so that the circuit behaves as a difference amplifier with an input resistance of 20 kΩ and a gain of 10.

947_Basic Electronics Circuits.jpg

Figure 1

2. Consider the instrumentation amplifier of Fig. 2 with a common-mode input voltage of+5V (dc) and a differential input signal of 10-mV-peak sine wave. Let (2R1)=1kΩ, R2 =0.5 MΩ, and R3=R4=10 kΩ. Find the voltage at every node in the circuit.

505_Basic Electronics Circuits1.jpg

Figure 2

3. Consider a symmetrical square wave of 20-V peak-to-peak, 0 average, and 2-ms period applied to a Miller integrator. Find the value of the time constant CR such that the triangular waveform at the output has a 20-V peak-to-peak amplitude

4. Design a differentiator to have a time constant of 10^-2 s and an input capacitance of 0.01μF. What is the gain magnitude and phase of this circuit at 10 rad/s, and at 103 rad/s? In order to limit the high-frequency gain of the differentiator circuit to 100, a resistor is added in series with the capacitor. Find the required resistor value.

5. Use an ideal op amp to design an inverting integrator with an input resistance of 10 k and an integration time constant of 10^-3s. What is the gain magnitude and phase angle of this circuit at 10 rad/s and at 1 rad/s? What is the frequency at which the gain magnitude is unity?

6. Consider an inverting amplifier circuit designed using an op amp and two resistors, R1=10 kΩ and R2=1MΩ. If the op amp is specified to have an input bias current of 100 nA and an input offset current of 10 nA, find the output dc offset voltage resulting and the value of a resistor R3 to be placed in series with the positive input lead in order to minimize the output offset voltage. What is the new value of V0?

7. An internally compensated op amp is specified to have an open-loop dc gain of 106 dB and a unity-gain bandwidth of 3MHz. Find fb and the open-loop gain (in dB) atfb, 300 Hz, 3 kHz, 12 kHz, and 60 kHz.

8. An op amp having a 106-dB gain at dc and a single-pole frequency response with ft = 2MHz is used to design a noninverting amplifier with nominal dc gain of 100. Find the 3-dB frequency of the closed-loop gain.

9. A Miller integrator whose input and output voltages are initially zero and whose time constant is 1ms is driven by the signal shown in Fig. 3. Sketch and label the output waveform that results. Indicate what

happens if the input levels are ±2 V, with the time constant the same (1 ms) and with the time constant raised to 2 ms.

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Figure 3

10. An op-amp differentiator with 1-ms time constant is driven by the rate-controlled step shown in Fig. 4. Assuming V0 to be zero initially, sketch and label its waveform.

1493_Basic Electronics Circuits3.jpg

Figure 4

Reference no: EM131860515

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