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Create a circuit capable of dividing two binary numbers with decimal values as large as 10,000.
Description: The circuit will have as inputs a minimum of two inputs; the binary equivalent of two decimal numbers of not greater than (10,000)10. The circuit will produce a minimum of two outputs, the quotient and the remainder. Design all components down to gate level. Use verilogger to simulate this.
What would this circuit look like in a flow chart/diagram?? If a state machine was used what would that look like?
Determine the settings Z1, Z2 & Z3 for the relay at B12.
Consider a satellite communication link with a one way propagation delay of 300ms between the sender and receiver, operating at 10Mbps using packets of length 1500bytes. Length of the ACK packet is also 1500 bytes.
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