Design a sequencer using j-k flip-flops

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Reference no: EM132078860

Need help with this question: Design a sequencer using J-K flip-flops that will sequence through the following states and then repeat the sequence in response to successive clock pulses: 0, 1, 3, 5, 7, 4, 0, .......

Needed: State Diagram, Binary State Transition Table, K-Maps and Reduced Expressions, and a complete diagram for Logisim.

This question was answered but it used an SR flip flop in combination with JK flip flops, I am looking to build this using only JK Flip Flops. Please help.

Reference no: EM132078860

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