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Consider the control system shown in Figure CP10.6. Design a lag compensator using root locus methods to meet the following specifications: (1) steady state error less than 10% for a step input, (2) phase margin greater than 45°, and (3) settling time (with a 2% criterion) less than 5 seconds for a unit step input.
(a) Design a lag compensator utilizing root locus methods to meet the design specifications. Develop a set of m-file scripts to assist in the design process.
(b) Test the controller developed in part (a) by simulating the closed-loop system response to unit step input. Provide the time histories of the output y(t).
(c) Compute the phase margin using the margin function.
Solve the equations from part (b) using the method of eigenfunction expansions. Describe what happens when f(t)= 1- cos(c&960;t/L).
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