Reference no: EM131772526
Architecture Assignment
1. Consider two programs running on a computer.
a. The first program's instructions can be broken into the following classes of instruction with associated percentages of the program:
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Type A
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Type B
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Type C
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Type D
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CPI:
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2
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2
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3
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1
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Percentage of Instructions:
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21%
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14%
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34%
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30%
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Percentage of Instructions: 21% 14% 34% 30%
Calculate the average CPI for the first program.
b. Assume the second program has an average CPI of 2.21 and IC = 22 x 103 and the CPU clock rate is 3.0 GHz. What is the run time of the program expressed in microseconds?
2. Assume we have a reference program P1 with 45,323,900 instructions that runs on a Motorola chip with an average CPI of 5. 6 and a clock rate of 3.8 GHz.
a. What is the execution time of P1 on the Motorola chip?
b. If a second program P2 runs 1.3 times faster on the Motorola chip with a clock rate of 4.0 GHz and the same instruction count, what is the CPI for P2?
3. Consider a program comprising 25% arithmetic instructions, 32% load instruction, 13% store instructions, and 30% branch instructions. Assume the CPI for arithmetic instructions is 1, for load and store instructions it is 4, and branches have a CPI of 2. The CPU clock rate is 3.4 GHz. We have a reference program with 1,102,000 instructions.
a. What is the run time of the program given?
b. Consider running the program on a machine with a large graphics card. When we run the program on this machine, the arithmetic instructions only can be run in parallel on the card, everything else is run sequentially. As the number of stream processors on the GPU goes toward infinity, what is the maximum speedup obtainable on this program?
c. Consider running the program on a version of the CPU with a clock rate of 2.4 GHz, but which has a CPI of 3 for load and store instructions (all other's CPIs remain the same). Which CPU performs better on the program and by how much?
4. An architecture runs a program of interest in 46 seconds on a particular computer chip constructed on a 90nm fab. Six years later a newer version of the chip requires only 11.5 seconds to run the same program.
a. Assuming the improvement comes primarily from clock rate, and the original chip ran at 1.2 GHz, what is the approximate new clock rate?
b. If the improvement in clock rate is due to Dennard scaling, what should be the approximate fabrication size, 14nm, 22nm, 32nm, or 45nm and why?
c. What Law accounts for the improved performance of this chip over time?