FET BIASING:

Not like BJTs, thermal runaway does not occur with the FETs. However, the differences in the maximum and minimum transfer characteristics make I_D levels  unpredictable  with  the simple  fixed-gate  bias  voltage.  To obtain the reasonable  limits  on quiescent drain currents I_D and drain-source voltage V_DS, source resistor and potential divider bias techniques should be used. With the few exceptions, MOSFET bias circuits are similar to those used in JFETs. 

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