What is random access memory, Computer Engineering

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Q. What is Random Access Memory?

We will discuss RAM as an example of sequential circuit. A memory unit is a collection of storage cells or flip flops along with associated circuits needed to transfer information in and out of device. The access time and cycle time it takes are constant and independent of location therefore the name random access memory.

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Figure: Binary Cell

RAMs are arranged (logically) as words of fixed length. Memory communicates with other devices by data input and output lines and address selection lines and control lines which specify direction of transfer.

Now let's try to understand how data is stored in memory. The internal construction of a RAM of 'm' words and 'n' bits per word comprises m ×n binary cells and connected circuits for detecting particular words. Figure below displays logic diagram and block diagram of a binary cell.

The input is fed to AND gate 'a' in complemented form. Read operation is denoted by 1 on read/write signal. Thus during read operation only 'AND' gate 'c' becomes active. If cell has been selected then output will become equivalent to state of flip flop it implies that data value stored in flip flop is read. In write operation 'a' & 'b' gates become active and they set or clear J-K flip flop relying upon input value. Please note in case input is 0 then flip flop will go to reflected in state of flip-flop. So we say that input data has been stored in flip-flop or binary cell.

Figure below is extension of this binary cell to an IC RAM circuit where a 2×4 decoder is used to select one of the four words. (For 4 words we require 2 address lines) Please note that every decoder output is connected to a 4 bit word and read/write signal is given to every binary cell. Once decoder selects word, read/write input tells operation. This is derived using an OR gate since all non-selected cells will generate a zero output. When memory select input to decoder is 0 none of words is selected and contents of cell are unchanged irrespective of read/write input.

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Figure: 4 × 4  RAM


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