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Q. Shared-memory programming model?
In shared-memory programming model tasks share a common address space that they read and write asynchronously. Several mechanisms like semaphores / locks can be used to control access to shared memory. A benefit of this model from programmer's point of view is program development can frequently be simplified. A significant shortcoming of this model (in terms of performance) is that for this model data management is tough.
How is EISA bus different from ISA bus? Extended Industry Standard Architecture (EISA) is a 32 bit modification to ISA bus. As computers became larger and had wider data buses,
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Why SRAM are said to be volatile? Because their contents are lost when power is interrupted. So SRAM are said to be volatile.
what are the different techniques of biasing a transistor?
Call request signal is: (A) Seize signal (B) Idle state signal (C) Line identification signal (D) Called subscriber alert signal Ans: Call request
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