Registers - processor, Computer Engineering

These will be independent of each other and will not affect to each other, and so they can be fed into two different implementations units and run in parallel. The ability to remove instruction level parallelism (ILP) from the instruction stream is necessary for good performance in a modern CPU.

Predicting which code can and cannot be divide up this way is a very difficult task. In many cases the inputs to one line are dependent on the output from a different, but only if some other condition is true. For instance, take the slight modification of the example noted before, A = B + C; IF A==5 THEN D = F + G. In this case the calculations stay independent of the other, but the second command needs the results from the first calculation in order to know if it should be run at all.

In these cases the circuitry on the CPU typically "guesses" what the condition will be. In something like 90% of all cases, an IF will be taken, suggesting that in our example the second half of the command can be safely fed into another core. Though, getting the guess wrong can cause a significant performance hit when the result has to be thrown out and the CPU waits for the results of the "right" command to be calculated. Much of the improving performance of modern CPUs is due to enhanced prediction logic, but lately the improvements have started to slow. Branch prediction accuracy has arrived at figures in excess of 98% in recent Intel architectures, and enhancing this figure can only be achieved by devoting more CPU die space to the branch predictor, a self-defeating tactic because it would make the CPU more expensive to manufacture.

Posted Date: 3/5/2013 5:42:14 AM | Location : United States







Related Discussions:- Registers - processor, Assignment Help, Ask Question on Registers - processor, Get Answer, Expert's Help, Registers - processor Discussions

Write discussion on Registers - processor
Your posts are moderated
Related Questions
importance of duality concep? Article Source: http://EzineArticles.com/4133733

Single Instruction and Single Data stream (SISD) In this organisation, sequential implementation of instructions is executed by one CPU having a single processing element (PE

Rigging is use for if we need to give animation for any object or character then we apply to character or object internal bone setting(like our bones).that is known as rigging. Whe

Define the Information System Growing sophistication in products and markets is driving the organisational requirement for increasing amounts of information. This req

Q. Convert the following BINARY numbers into HEXADECIMAL, double check by converting the result HEXADECIMAL to BINARY. a) 1101.0110 b) 1011.11010 c) 11110.01011

Bit Serial Associative Processor (BSAP) : When the associative processor accepts bit serial memory organization then it is known as bit serial associative processor. While only one

Define word length?  Every group of n bits is referred to as a word of information and n is known as the word length.

THE ANALYTICAL ENGINE BY BABBAGE: It was general use computing device that could be used for performing any types of mathematical operation automatically. It contains the follo

What is USB USB (UNIVERSAL SERIAL BUS) is intended to connect peripheral devices like mouse, keyboards, modems and sound cards to microprocessor through a serial data path and

Examples of declarations of external variables  that  are  not definitions: extern char stack[10]; extern int stkptr; These declarations tell the compiler that the variab