Register data type as sequential element, Computer Engineering

Assignment Help:

Reg data type as Sequential element

module reg_seq_example( clk, reset, d, q);

input clk, reset, d;

output q;

reg q;

wire clk, reset, d;

always @ (posedge clk or posedge reset)

if (reset) begin

q <= 1'b0;

end else begin

q <= d;

end

endmodule

There is a difference in the process of assigning to reg when modeling combinational logic: in this logic we use blocking assignments when modeling sequential logic we use nonblocking ones.

 


Related Discussions:- Register data type as sequential element

What do you understand by electronic funds transfer, What do you understand...

What do you understand by Electronic Funds Transfer?  Electronic Funds Transfer: It's an electronic payment method that transfers the money value from one bank account to

State about the behavioral modeling, State about the Behavioral modeling ...

State about the Behavioral modeling Behavioral means how hardware behaves determine exact way it works we write using HDL syntax. For complex projects it's better mixed approac

Define parity bit and list its types, Define parity bit and List its types....

Define parity bit and List its types. The most common error detection code used is the parity bit. Parity bit is a extra bit contained with a binary message to make the total n

Goals - artificial intelligence, Goals - artificial intelligence: One ...

Goals - artificial intelligence: One desirable way to make perfect an agent's performance is to enable it to have some details of what it is trying to complete. If it is given

Technical Support Engineer, I''m seeking a challenging professional working...

I''m seeking a challenging professional working position in the field of Information Technology,where I’ll be given the chance to enhance & expand the skills & experience

Explain wait for graph-resource request and allocation graph, Explain Wait ...

Explain Wait for graph (WFG) with Resource request and allocation graph (RRAG). WFG with RRAG: A graph G = (V,E) is termed as bipartite if V can be decomposed in two

Scientific applications-image processing, Scientific Applications/Image pro...

Scientific Applications/Image processing Most of parallel processing functions from science and other academic subjects, are mainly have based upon arithmetical simulations whe

Design requirements of sequential circuit, What are the Requirements to des...

What are the Requirements to design Sequential circuit Ans . Design Requirements of Sequential circuit: (i) The circuit specifications translated into a state diagram

Explain how the server control validation controls work, Briefly explain ho...

Briefly explain how the server control validation controls work? A validation control works by evaluating the value of an input server control on the page to see whether it me

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd