Integrating virtual memory, tlbs, and caches, Computer Engineering

Integrating Virtual Memory, TLBs, and Caches - computer architecture:

 

258_Integrating Virtual Memory, TLBs, and Caches.png

There are 3 types of misses:

1. a cache miss

2. TLB miss

3. a page fault

2 technique of writes: write -through (write buffer required) or write -back (dirty bit in page table required).the last one is also called the copy -back technique 

Posted Date: 10/13/2012 5:58:50 AM | Location : United States







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