Instruction size , Electrical Engineering

Instruction size

As we  have seen already  that each instruction has two parts

Opcode ( Operation  Code)

Which  tells  the types  of operation  to be  performed .


On which  operation is to be  performed  it many  be a register a memory  location 8 bit  port address 16 bit  memory  locations 8 bit  data or 16 bit  data.

According  to the size 8085 instructions  are classified  into followings  three  groups .

a.One byte instructions

b.Two byte instructions

c.Three byte instructions

Posted Date: 4/5/2013 2:53:33 AM | Location : United States

Related Discussions:- Instruction size , Assignment Help, Ask Question on Instruction size , Get Answer, Expert's Help, Instruction size Discussions

Write discussion on Instruction size
Your posts are moderated
Related Questions
Q. Explain the External Data Bus? External Data Bus: A bus which connects a computer to peripheral devices. 8088 microprocessor has 16-bit registers, 16-bit internal data bus i

Question: a) Give three ways how to reduce cost in embedded systems. b) What is a microcontroller? How is it different to a microprocessor? c) Briefly comment on the "A

Apply the rule-of-thumb dc design presented in this section for a silicon npn BJT with β = 70 when the operating Q point is defined by I CQ = 15 mA and I BQ = 0.3 mA, with a dc s

ABCD propagation of an optical ray through a system can be explained by a simple 2_2 matrix. In ray optics, the characteristic of a system is given by the corresponding ray matrix

what ternary alloy, composition and binary substrate can be used for an LED at 1.55 µm optical fiber windo

Q. Explain Integral-error or reset control? A control system is said to possess integral-error control when the generation of the output in some way depends upon the integral o

principle and operation of a 3phace induction motor

Q. Draw and explain an RC integrator .Derive the relation between input  and output voltage. Solution: A circuit in which the output voltage is directly proportional  to the

Q. An interface circuit consisting of R 1 and R 2 is designed between the source and the load, as illustrated in Figure such that the load sees a Thevenin resistance of 50  betw